Semiconductor wafer fabrication concludes with forming contacts to access circuitry on the wafer. Increasingly flip chip bonds formed of solder bumps are being used for contacts since a very large number of contacts can be provided in an area array. Evaporation or sputtering through a shadow mask made of a thin sheet of molybdenum has long been used for forming the solder bumps.
Traditionally, a high reliability solder bump connection has been achieved by providing a solder bump with a very high lead content. This has been acceptable for solder bump contacts to ceramic substrates that can tolerate the high temperature needed to melt high lead content solder. However, for connection to low temperature substrates, such as plastic substrates, a composition that provides a low melting point tin cap on a standard reflowed high-lead composition solder bump is desired, as described in commonly assigned U.S. Pat. No. 5,729,896, to Dalal et al., incorporated herein by reference. A two-mask process for forming these tin cap solder bumps is described in commonly assigned U.S. Pat. No. 5,922,496, to Dalal et al., incorporated herein by reference. However, the present inventors found that the second mask for tin cap deposition damages high melting point solder bumps formed in the first masking step. Thus, a solution is needed that improves the process to avoid damage to solder bumps formed in the first masking step.
In addition, the invention also provides a solution to a second problem. After the first shadow mask has been positioned, the wafer is subjected to a plasma etching step to remove oxide that may be covering contact pads, to reduce contact resistance between contact pads and ball limiting metallurgy that underlies the solder bump. Portions of the wafer that are covered by the molybdenum mask are protected from the plasma while contacts that are located under holes in the mask are subjected to the plasma and have oxide removed. However, uniformity of oxide removal across the wafer has been a problem, and some regions of the wafer were found to have lower contact resistance than others. Thus, a better solution for plasma etching is required to provide a way to provide more consistent low contact resistance across the wafer. A solution that both provides substantially improved contact resistance uniformity as well as avoiding damage to solder bumps if a second masking and deposition step is used, is provided by the following invention.